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Verilog

6 projects

Showing 6 of 6 projects

fusesoc
fusesocPython

Package manager and build abstraction tool for FPGA/ASIC development, enabling IP core reuse and SoC creation.

#ip-core-management#fpga#verilog
Stars1.4k
Forks271
Last commit7 days ago
MetroBoy
MetroBoyC++

Gate-level simulation of the original Game Boy hardware, reverse-engineered from die shots of the DMG-01 chip.

#die-shot-analysis#fpga-tools#simulator
Stars1.2k
Forks36
Last commit1 year ago
svls
svlsRust

A language server for SystemVerilog providing linting and IDE integration.

#language-server#verilog#ide-integration
Stars575
Forks32
Last commit1 month ago
VerilogBoy
VerilogBoyVerilog

An open-source Game Boy compatible console implemented in Verilog RTL for FPGA hardware.

#fpga#embedded-systems#rtl-design
Stars526
Forks63
Last commit3 years ago
awesome-fpga
awesome-fpga

A curated collection of FPGA resources including tutorials, books, devices, tools, and community references for hardware development.

#fpga#hardware-design#embedded-systems
Stars389
Forks32
Last commit9 years ago
vscode-verilog-hdl-support
vscode-verilog-hdl-supportTypeScript

A comprehensive VS Code extension providing syntax highlighting, linting, formatting, and language server support for Verilog, SystemVerilog, VHDL, and related hardware description languages.

#verilog-hdl#hardware-description-languages#vscode-extension
Stars368
Forks85
Last commit2 days ago

Related Tags

#Fpga3#Digital Design3#Vhdl3
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