Sail
A language for formally specifying instruction-set architecture (ISA) semantics with tooling for emulators, documentation, and verification.
What is Sail?
Sail is a domain-specific language for formally specifying the semantics of processor instruction-set architectures (ISAs). It enables architects and verification engineers to write precise, machine-checkable definitions of how instructions behave, which can then be used to generate emulators, documentation, and verification models. The language solves the problem of maintaining consistency between informal pseudocode and various downstream tools.
ISA architects, hardware verification engineers, and researchers working on formal methods for processor design. It's particularly valuable for teams developing or verifying complex ISAs like Arm, RISC-V, or CHERI extensions.
Sail provides a single authoritative source for ISA semantics that can be automatically transformed into multiple artifacts (emulators, documentation, verification models), eliminating inconsistencies between different representations. Its lightweight dependent typing and integration with theorem provers enable rigorous verification while maintaining engineer-friendly syntax.
Overview
Sail architecture definition language
Use Cases
Best For
- Creating authoritative reference specifications for new processor architectures
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